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OV5116N
OV5116N SINGLE IC CMOS MONOCHROME CAMERA WITH NTSC ANALOG OUTPUT Features
Single chip 1/4 inch format video image sensor EIA/NTSC output Selectable mirror image Auto gain control (maximum + 18 dB) High I.R. sensitivity for nighttime applications Auto and manual backlight compensation mode Gamma correction -On/Off External frame sync capability 40mw on-chip power consumption External data acquisition support Smear free Auto level expanding Optional edge enhancement
General Description
The OV5116N is a complete black and white CMOS Video Camera chip. It conforms to EIA/NTSC (60 Hz) standards and outputs composite video capable of directly driving a 75 display device. The on-chip auto exposure allows for a wide range of lighting conditions, eliminating the need for external mechanical shutter components. This, along with its single supply, low power consumption makes the OV5116N an incredibly versatile and cost-effective video camera perfect for the following types of applications:
Applications
Security Surveillance Machine Vision Process Control CCTV Infant Monitoring Toys
VRCHG
VREQ
AVDD
DEVDD
Key Specifications Array Size Effective Image Area 25 DEGND 24 ATBLKT Auto Electronic Exposure (seconds) Minimum Illumination S/N Ratio Power Supply Power Requirements Package Type 320 x 240 pixels 3.2 x 2.5mm
N50
SVDD
4 ABOFF VCBRT 5 6
3
2
1
AGND
28 27 26
1/60-1/6000 0.5 lux @ f 1.4 (3000k) 46 dB (AGC=1x) 5VDC, 5% (40 mw beforeloading), 70mw standard loading 28 pin LCC
SGND 7 NTSC 8 BKLT 9 XTAL2 10 XTAL1 11 12 FSI
OV5116N 28 PIN LCC
23 OVDD 22 CVO 21 DGND 20 DVDD 19 PCLK/G8X
13 14 15 16 OENB BPED G4X FAST
17 18 FSO/MIRR GAMMA
OV5116N PIN ASSIGNMENT
OmniVision Technologies, Inc. 930 Thompson Place Sunnyvale, CA 94085 U.S.A. Tel: (408) 733-3030 Fax: (408) 733-3061 e-mail: info@ovt.com Website: http://www.ovt.com
Version 2.1, May 4, 2001
OMNIVISION TECHNOLOGIES, Inc.
OV5116N
1. Introduction
This section describes the features and functions of the OV5116N, a monochrome CMOS video camera integrated circuit. Table 1. Pin # 1, 2, 20, 23, 26 3 4 5 6 7, 21, 25, 28 8 *9 10 11 12 13 14 15 16 17 18
SINGLE IC CMOS MONOCHROME CAMERA WITH NTSC ANALOG OUTPUT
2. Pin Assignments:
Name
Pin Descriptions Class Bias Function Power (+5V) connections. AVDD, SVDD, DVDD, OVDD DEVDD VRCHG N50 ABOFF VCBRT SGND, DGND, DEGND, AGND NTSC BKLT XTAL2 XTAL1 FSI OENB G4X FAST BPED GAMMA FSO/MIRR
OA I-O I-O OA Bias I-1 I-O XO XI I-O I-O I-O I-O I-O I-1 I/O O/O
Internal voltage reference. Connect to AGND with a 0.1uF capacitor. Set low(O)=standard NTSC. Set high (1)=50hz light (For use in Japan Only); Auto brightness level descending function off Video DC Output Black level, leave it open in usual case Ground connections. Connect to supply common. Set high(1)=EIA/NTSC mode Backlight mode 1 Oscillator clock output or crystal output. External oscillator input or crystal input: 12.288MHz External frame sync input. A rising edge on FSI sets the chip timing to vertical sync. Leave open if unused. A logic level input to enable or tri-state CVO. Logic high(1)=tri-state;low(O)=enabled. A logic level input which when high places the maximum AGC gain to 4x. When low the sensor AGC gain is 2x. A logic level input to enable/disable AGC/AEC FAST mode. High enables, low disables, which provides slow and smooth AGC/AEC mode. A logic level input to disable on chip edge enhancement. High disable, low enable. A logic level pin to select the transfer characteristic of output voltage versus light input. Logic high for g=0.45; low for g=1. In/out pin.Frame Sync Output. Digital frame sync output pin. Positive pulse occurs during the CVO vertical sync period. Input is a logic level input to enable mirror function. Low(O)=Standard, High(1)=Mirror. Digital pixel clock output. Provides 2 functions: When high a valid pixel is present at CVO and in sync with PCLK. Input is a logic level input to enable maximum AGC gain to 8x (only effective when pin 14 is set to high(1)) The composite video output signal. The output is a source follower capable of directly driving a 1V p-p signal into a 108 load.(75 external and 33 internal) Backlight mode 2
19
PCLK/G8X
I/O O/O
22 *24
CVO ATBLKT
Q I-O
27 VREQ OA Internal voltage reference level. Connect to AGND with a 0.1uF capacitor. * Pin 9 and Pin 24 must be used in a logical combination as per the following table:
A TB LK (Pin 24) O O 1 1 C lass I-1 I-O I/O OA Q XI/XO B ias O : Low ; O : O utput
B LK T(Pin 9) O 1 O 1
M ode N orm al M ode M ode 1 - M anual B ack light M ode 2 - A utom atic B ack light (C hip determ ination) Future U se
D efault Level digital input, w ith 100k pull up digital input, w ith 100k pull dow n digital C M O S level input and output analog C M O S reference voltage 75 ohm output crystal input/output pow er supply bias
May 4, 2001
Version 2.1
2
OMNIVISION TECHNOLOGIES, Inc.
OV5116N
SINGLE IC CMOS MONOCHROME CAMERA WITH NTSC ANALOG OUTPUT
3. Electrical Characteristics
Table 2. Electrical Parameters
PARAMETER VDD Vpeak Vblnk Vsync IDD1 IDD2 Cin fosc tcyc tr, tf CONDITIONS Power supply voltage CVO output peak voltage* CVO output blank voltage* CVO output sync voltage* Functioning with 108 load on CVO Functioning with 10k load on CVO Maximum pin capacitor Crystal/ceramic resonator frequency: 60Hz Pixel clock cycle time: 60Hz Maximum digital input rise/fall time 12.288 163 20 MIN 4.75 TYP 5.00 1.0 0.4 0 15 6 10 MAX 5.25 Units volts volts volts volts mA mA pF MHz ns ns
* assuming standard loading of 108 (33 internal+75 external).
Table 3. OV5116 TV Timing Specification
Parameters 1 2 3 4 5 6 7 8 9 10 Number of lines per frame Field frequency Line period Line blanking interval Line synchronizing pulse Field blanking interval First equalizing pulse width Field synchronizing pulse width Second equalizing pulse width FSO width 525 60.01 63.476 11.41 4.56 22/23 3/2.5 3 2.5/3 3 Units lines Hz sec sec sec line line line line line
May 4, 2001
Version 2.1
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OMNIVISION TECHNOLOGIES, Inc.
OV5116N
0.002 0.003 0.020 REF.x45 0.060 0.006 0.020 0.002 0.020 0.002 0.020 0.002
SINGLE IC CMOS MONOCHROME CAMERA WITH NTSC ANALOG OUTPUT
NOTES: 1) All dimensions in inches.
Bottom View
0.330 5 0.050 0.075 0.010 11
Top View
0.450 SQ. 0.008 0.350 SQ. 0.006
0.007 MAX. B/F PULL BACK 0.013 MAX. B/F EXPOSURE
0.011 MIN. 8 9 0.300 SQ. 0.005 0.024 22 PLCS 2 PA 4 12 0.050 0.008 27 PLCS
7 6
0.010.x45 PIN NO. 1 INDEX
A-A
28 0.025 0.003 28 PLCS
0.040 REF.x45 3 PLCS
26
18
20 R 0.012 4 PLCS 21 22
0.014 24 PLCS
1
PIN 1 INDEX
1
23
25
R 0.009 28 PLCS 0.035 MIN.
19
0.015 MIN. 4 PLCS
0.200 0.005
0.040 4 PLCS
0.085 0.010
1
Scan Origin (Row #1, Column #1)
DIE
Sensor Array Package Center (0, 0) Array Center (-0.011 , -0.011) Scan End (Final Row, Final Column)
Top View
Note: Most lens assemblies reverse the viewed scene onto the sensor array, which generally means that pin 1 should be located at the bottom of the p.c. board. To ensure correct display orientation, check the lens specification prior to laying out the printed circuit board.
Figure 1. OV5116 Series Package and Sensor Array Dimensions
May 4, 2001
Version 2.1
4
OMNIVISION TECHNOLOGIES, Inc.
OV5116N
SINGLE IC CMOS MONOCHROME CAMERA WITH NTSC ANALOG OUTPUT
OV5116 Module Reference Design (Use for all new designs)
J1 1 CON1 PWR 3 U1 MC78L05ACP VIN GND VOUT VCC 1
(5V)
C1 .1U-0603
C2 47U-16 VCC R1 10K-0603 VCC VCC C3 R2 1U/TE-A 10K-0603 C4 .1U-0603 VCC R3 R4 10K-0603 U2 R5 10K-0603 10K-0603 33-0603 4 3 2 1 28 27 26 R6 R7 C5 .1U-0603 VCC J4 CON1 1
J2 1 CON1 GND
2
GND
1
J3 CON1
VCC
10K-0603 R8 10K-0603
Y1:13.5MHz, R9-on 50Hz, 352x288 Y1:12.288MHz, R9-off 60Hz, 320x240 R8 OFF ON OFF ON R15 R14
J5 1 CON1 NTSC
R5 OFF Normal OFF Manual Back Light ON Auto Back Light1 ON Auto Back Light2 4x max gain AGC/AEC Fast mode (10k pull up resistor for outdoor use) R12 Bypass Edge R13 Gamma off R10 Mirror mode R7 8X GAIN(Effect only R15on) R2 N50 mode R4 Auto Brightness Off R9 Pal/Ntsc Switch R1/R3 Adjust Brightness level(open at normal case)
5 6 7 8 9 10 11 Y1
N50 VRCHG SVDD AVDD AGND VREQ DEVDD
ABOFF VRBRT SGND NTSC BKLT XTAL2 XTAL1
OV5116
DEGND ATBLT OVDD CVO DGND DVDD PCLK/G8X
25 24 23 22 21 20 19
CVO J6 G8X J7 CON1 1 1 CON1
R9 10K-0603
12 13 14 15 16 17 18
FSI OENB G4X FAST BPED GAMMA FSO/MIRR
X-12.288M R11 1M-0603 C6 10P-0603 C7 10P-0603
R10 MIRR
VCC J10 10K-0603 R13 1 CON1
J8 CON1
1
J9
1 CON1
FSI R12 OENB
GAMMA VCC
J11 1 CON1
10K-0603 R14 10K-0603 J12 FAST G4X 1 CON1 J13 1 CON1 R15 10K-0603
10K-0603
Option
930 Thompson Place, Sunnyvale, CA 94086 Phone 408-733-3030 Fax 408-733-3061 Title OV5116MD Size Custom Date: Document Number OV5116 MODULES Tuesday, September 21, 1999 Sheet 1 of 1 Rev A
Figure 3. Reference Design for OV5116 (Use for all new designs)
OmniVision Technologies, Inc. reserves the right to make changes without further notice to any product herein to improve reliability, function, or design. OmniVision Technologies, Inc. does not assume any liability arising out of the application or use of any product or circuit described herein; neither does it convey any license under its patent rights nor the rights of others. No part of this publication may be copied or reproduced, in any form without the prior written consent of OmniVision Technologies, Inc.
May 4, 2001
Version 2.1
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